Samsung expands packaging R&D
Samsung has opened a new advanced packaging research facility in Japan to accelerate development of chiplet, bonding, interposer and substrate technologies for next-generation semiconductor packages.
Samsung has opened an Advanced Package Lab (APL) in Yokohama, Japan, as it expands its research and prototyping capabilities for advanced semiconductor packaging.
The facility, located in Minato Mirai, Yokohama, covers approximately 6,600 square metres and forms part of Samsung's five-year, ¥40 billion investment plan in Japan launched in 2024.
The lab includes cleanroom facilities designed to support packaging research, process evaluation and prototype development. Around 95 researchers from Samsung's South Korean and Japanese operations are currently working at the facility, with the company planning to increase the workforce to more than 100 researchers by 2027.
A key focus of the APL will be Samsung's 3.xD chiplet packaging technology, alongside research into bonding, interposers and substrate mounting. These technologies are becoming increasingly important for AI accelerators, where high-bandwidth connections between logic dies and HBM are required.
The facility will also enable Samsung to evaluate new packaging materials and processes using Japan's established semiconductor supply chain.
Samsung already works with more than 50 Japanese companies across semiconductor materials, equipment and components. The ecosystem includes suppliers of package substrates, underfill materials, wafer bonding equipment and wafer processing technologies.
By conducting material and process evaluations closer to these suppliers, Samsung aims to shorten development cycles. The company expects the facility to reduce the time required to evaluate some new materials from as much as two months.
The Yokohama lab is intended to operate as a global advanced packaging R&D hub, allowing Samsung to develop and test packaging processes before transferring suitable technologies towards manufacturing.
The investment highlights the growing importance of advanced packaging as semiconductor manufacturers look to integrate chiplets, HBM and heterogeneous devices while managing the increasing complexity of high-performance AI systems.
