TSMC expands CoWoS capacity
TSMC is expanding its advanced packaging capacity in Taiwan and the US as demand for AI processors drives continued growth in its CoWoS technology.
TSMC is accelerating the expansion of its advanced packaging capacity as demand for AI processors continues to increase, with additional CoWoS manufacturing planned in Taiwan and Arizona.
The company is expanding capacity at its Chiayi AP7 facility while also developing advanced packaging capabilities in Arizona. The expansion is intended to support growing demand for chip-on-wafer-on-substrate (CoWoS) technology from AI chip companies, including NVIDIA.
According to Taiwanese media reports, TSMC is targeting monthly CoWoS capacity of 260,000 units by the end of 2028.
The advanced packaging expansion comes alongside a broader increase in TSMC's leading-edge manufacturing capacity. The company is reported to be expanding production of 2nm and 3nm technologies in response to strong demand for AI and high-performance computing devices.
TSMC is building additional wafer manufacturing capacity in Taiwan, Arizona and Japan, while also converting some existing 5nm production lines to support 3nm manufacturing.
The company has previously highlighted strong demand for AI-related chips and raised its annual capital expenditure outlook to between $60 billion and $64 billion, with around 70% to 80% expected to be allocated to advanced process technologies.
As AI processors increase in complexity, advanced packaging technologies such as CoWoS have become increasingly important for integrating high-performance logic with high-bandwidth memory and other components.
TSMC's latest expansion underlines the growing importance of advanced packaging capacity alongside leading-edge wafer fabrication as semiconductor manufacturers seek to meet demand from the rapidly expanding AI infrastructure market.
