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AI boom drives surge in CoWoS packaging demand

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Global demand for chip-on-wafer-on-substrate (CoWoS) advanced packaging is projected to reach one million wafers by 2026, as AI infrastructure accelerates. Nvidia is expected to secure around 60% of total capacity, highlighting the growing strategic importance of advanced packaging in the semiconductor supply chain.

Demand for CoWoS (chip-on-wafer-on-substrate) packaging is set to surge as artificial intelligence applications continue to drive growth across the semiconductor industry. A recent research note from Morgan Stanley forecasts global demand for CoWoS wafers to reach around one million units by 2026.

A significant share of this capacity is expected to be secured by Nvidia, which is projected to book approximately 595,000 CoWoS wafers roughly 60% of global demand. Of these, about 515,000 wafers will be supplied by TSMC, with the majority allocated to its advanced CoWoS-L packaging technology.

The capacity will primarily support Nvidia’s next-generation AI platforms, including Rubin AI chips, Vera CPUs, the GB100 architecture, and automotive processors. The company is also diversifying supply by sourcing additional CoWoS capacity from packaging providers such as Amkor Technology and ASE Technology.

Other major semiconductor players are also securing CoWoS capacity to support AI and high-performance computing applications. Broadcom is expected to procure around 150,000 wafers, largely for custom chips supporting hyperscale clients, including Google, Meta Platforms, and OpenAI.

Meanwhile, AMD is forecast to secure roughly 105,000 wafers to support its MI355 and MI400 series AI accelerators, along with its Venice CPU platform. Additional demand is also emerging from cloud providers such as Amazon Web Services, which has reportedly booked CoWoS capacity through design partner Alchip Technologies.

The growing demand across hyperscalers, AI chip designers and custom silicon providers highlights how advanced packaging technologies such as CoWoS have become critical enablers of next-generation AI and high-performance computing systems.