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ECTC 2026 spotlights advanced packaging

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Hybrid bonding, co-packaged optics, panel-level packaging and CoWoS reliability will feature prominently at ECTC 2026 as the conference showcases the latest developments in advanced semiconductor packaging.

The 76th IEEE Electronic Components and Technology Conference (ECTC) will take place from 26–29 May in Orlando, Florida, bringing together more than 2,000 engineers and researchers to present the latest developments in advanced semiconductor packaging and heterogeneous integration.

This year’s technical programme places strong emphasis on hybrid bonding, chiplet integration, co-packaged optics, panel-level manufacturing and advanced packaging reliability, reflecting the industry’s accelerating focus on AI infrastructure and high-bandwidth computing systems.

Among the highlighted papers, Applied Materials will present a 450nm pitch copper hybrid bonding demonstration achieving 98% yield across 20 million interconnects, while KIOXIA will discuss multi-stacked wafer-to-wafer bonding processes for future 3D flash memory architectures.

ASML will showcase approaches to improving die-to-wafer hybrid bonding overlay accuracy below 80nm, targeting scalable heterogeneous integration, and CEA-Leti will present electroplated indium micro-bumps aimed at ultra-fine-pitch interconnects for photonics, chiplets and quantum computing applications.

Co-packaged optics will also be a major focus, with presentations from AIST, GlobalFoundries, Corning and Intel covering detachable optical connectors, optical redistribution layers and embedded silicon photonics technologies designed to support next-generation AI and data centre architectures.

Manufacturing-focused sessions will address panel-level processing, fine-line lithography and advanced interconnect materials.

Resonac is set to present panel-level CMP processes for HBM4-class organic interposers, while USHIO will demonstrate stitching-free lithography across ultra-large glass panels for AI packaging applications.

Reliability studies from TSMC and Renesas will examine CoWoS packaging performance, board-level reliability and automotive-grade chiplet integration, highlighting the growing importance of thermal management, electromigration and interconnect durability in advanced package design.

ECTC remains one of the semiconductor industry’s leading conferences for advanced packaging technologies, with this year’s programme reflecting the rapid evolution of packaging architectures driven by AI, high-performance computing and heterogeneous system integration.