Advanced Packaging bottleneck hits Apple
Strong production of Apple’s 2 nm A20 Pro processor is reportedly being held back by limited DRAM supplies, highlighting advanced packaging as a key manufacturing bottleneck.
A shortage of mobile DRAM is reportedly slowing production of Apple’s next-generation A20 Pro processor by delaying advanced packaging, despite strong manufacturing yields on TSMC’s 2 nm process.
According to reports, Apple’s A20 Pro is the first processor to use TSMC’s Wafer-Level Multi-Chip Module (WMCM) packaging technology, which integrates the application processor and high-performance DRAM at the wafer level.
The approach replaces TSMC’s long-standing Integrated Fan-Out (InFO) packaging for Apple’s flagship mobile chips.
While production of the A20 Pro on TSMC’s N2 node is said to be progressing smoothly, limited DRAM availability is preventing completed processor wafers from moving into the WMCM packaging stage.
The report claims TSMC is currently holding around $1 billion worth of finished processor wafers awaiting memory integration.
The packaging technology is being qualified on pilot production lines at TSMC’s Advanced Packaging Fab 3 in Longtan and is expected to ramp at its AP7 facility in Chiayi.
The reported bottleneck also highlights the growing role of advanced packaging in semiconductor manufacturing.
As logic and memory are increasingly integrated within a single package, packaging capacity and component availability are becoming as critical as wafer fabrication in determining production schedules.
The delay could reduce the time available for final device assembly ahead of Apple’s next iPhone launch, although suppliers are reportedly working to secure sufficient DRAM to meet expected demand.
The situation underscores how advanced packaging technologies such as WMCM are becoming central to next-generation mobile processor manufacturing.
