AMD extends AI capacity planning
Growing AI demand is prompting AMD and its partners to plan wafer, advanced packaging and substrate capacity as much as five years ahead.
AMD is extending its supply chain planning horizon to as much as three to five years as demand for AI processors continues to increase, according to reports surrounding CEO Lisa Su’s recent meetings with supply chain partners in Taiwan.
The company is working with TSMC, backend manufacturing partners and substrate suppliers to expand capacity in line with its expected AI processor ramp.
Su said AMD’s previously announced plans to invest more than $10 billion in Taiwan’s semiconductor ecosystem remain on track.
Advanced packaging is becoming a key consideration as AMD increases AI chip shipments.
Su highlighted growing demand for TSMC’s CoWoS technology, while also noting that AMD is exploring other approaches, including Fan-Out Panel-Level Packaging (PLP).
AMD does not view Fan-Out PLP as a replacement for CoWoS, with different packaging technologies expected to serve different requirements as AI systems scale.
The capacity push is linked to AMD’s next-generation AI platforms. The company has begun production of its MI450-series AI platform, which uses TSMC’s 2nm process and CoWoS packaging, with higher-volume shipments expected in 2027.
The subsequent MI455 platform is expected to enter production during the first half of 2027.
Su also highlighted the need for close coordination across the supply chain, with wafer fabrication, packaging and substrate capacity needing to scale together.
AMD is also working with memory suppliers in South Korea to secure the HBM supply required for its next-generation AI accelerators.
The developments underline the growing importance of advanced packaging capacity to AI semiconductor supply chains, as chip manufacturers increasingly need to secure packaging and substrate capacity alongside leading-edge wafer production.
